6502

Online 6502 simulator (really cool!!!)

6502 Addressing modes

Immediate#nn
Absolutennnn
Zero Pagenn
Implied
Indirect Absolute(nnnn)
Absolute Indexed,Xnnnn,X
Absolute Indexed,Ynnnn,Y
Zero Page Indexed,Xnn,X
Zero Page Indexed,Ynn,Y
Indexed Indirect (a.k.a. Indirect X)(nn,X)
Indirect Indexed (a.k.a. Indirect Y)(nn),Y
Relative+nnnn
AccumulatorA
  • nnnn = 16 bit unsigned value
  • nn = 8 bis unsigned value
  • +nn = 8 bits signed (two’s complement) value in range -128 to +127
flag| N | V |___| B | D | I | Z | C |
NNegative
VOverflow
BBRK command
DDecimal mode on
IIRQ disable
ZZero
CCarry

There are 56 instructions in 6502 (a little more on 65C02)

LDALoaD the Accumulator
LDXLoaD the X register
LDYLoaD the Y register
STASTore the Accumulator
STXSTore the X register
STYSTore the Y register
STZSTore Zero into memory (65C02 only)
Increment and Decrement
INCINCrement memory by one
INXINCrement X by one
INYINCrement Y by one
DECDECrement memory by one
DEXDEcrement X by one
DEYDEcrement Y by one
CLCCLear Carry flag
CLDCLear Decimal mode
CLICLear Interrupt disable
CLVCLear oVerflow flag
SECSEt Carry
SEDSEt Decimal mode
SEISEt Interrupt disable
SEVDO NOT EXIST
TSXTransfer Stack pointer to X
TXSTransfer X to Stack pointer
PHAPusH A on stack
PHPPusH Processor status flags on stack
PLAPulL A from stack
PLPPulL Processor status flags from stack
PHXPusH X on stack (65C02 only)
PLXPulL X from stack (65C02 only)
PHYPusH Y on stack (65C02 only)
PLYPulL Y from stack (65C02 only)
TAXTransfer A to X
TAYTransfer A to Y
TXATransfer X to A
TYATransfer Y to A
TXY or TYXDO NOT EXIST
ANDAND memory with A
ORAOR memory with A
EORExclusive-OR (XOR) memory with A
ASLAccumulator Shift Left
LSRLogical Shift Right
ROLROtate Left
RORROtate Right
BCCBranch on Carry ClearC == 0
BCSBranch on Carry SetC == 1
BEQBranch on EQual to zeroZ == 1
BNEBranch on Not Equal to zeroZ == 0
BMIBranch on MInusN == 1
BPLBranch on PLusN == 0
BVSBranch on oVerflow SetV == 1
BVCBranch on oVerflow ClearV == 0
JMPJuMP to another location
BRABranch Relative Always (65C02 only)
BBRBranch if specified Bit is Reset (some 65C02 only)
BBSBranch if specified Bit is Set (some 65C02 only)
CMPCoMPare memory and A
CPXComPare memory and X
CPYComPare memory and Y
BITBITs test
TRBTest and Reset Bits with A (65C02 only)
TSBTest and Set Bits with A (65C02 only)
RMBReset specified Memory Bit (some 65C02 only)
SMBSet specified Memory Bit (some 65C02 only)
ADCADd to accumulator with Carry
SBCSuBtract from accumulator with Carry
JSRJump to SubRoutine
RTSReTurn from Subroutine
RTIReTurn from Interrupt
NOPNo OPeration
BRKBReak
STP(some 65C02 only)
WAI(some 65C02 only)